A PROCESSOR UTILIZATION MODEL FOR A MULTIPROCESSOR COMPUTER SYSTEM
1975) A PROCESSOR UTILIZATION MODEL FOR A MULTIPROCESSOR COMPUTER SYSTEM. Technical Report CS75016-R, Computer Science, Virginia Tech. (
A processor utilization model for a simplified multiprocessor computer system is developed. Jobs are assumed to arrive according to a general input process, and each job is assigned randomly to an available processor. A finite capacity input buffer is used if no processor is available. The mathematical model is based on the busy period analysis, and two utilization measures are derived: (1) processor utilization when the system is busy (the fraction of processor occupation time during a busy period), and (2) global processor utilization (the fraction of processor occupation time during a busy cycle). Additionally, the arbitrary time state probability distribution is obtained and serves as the basis for the above measures in addition to others. Several approximations enable the development of a computational model from the mathematical model. Experimentation with the computational model reveals the sensitivity of the model to variability in the arrival process. Comparison of 2-processor and 4-processor systems from the operator perspective indicates a qualified preference for the behavior of the 2-processor system. This preference must be carefully interpreted since processor costs, the increase in overhead with an increase in processors, and behavioral variables reflecting the user perspective are excluded.
|Item Type:||Departmental Technical Report|
|Keywords:||multiprocessor, processor utilization, finite buffer capacity, computational model, busy cycle, experimental comparison|
|Subjects:||Computer Science > Historical Collection(Till Dec 2001)|
|Deposited By:||Administrator, Eprints|
|Deposited On:||27 April 2006|