Computer Science Technical Reports
CS at VT

Validation, Verification, and Testing Techniques Throughout the Life Cycle of a Simulation Study

Authors UNSPECIFIED (1994) Validation, Verification, and Testing Techniques Throughout the Life Cycle of a Simulation Study. Technical Report ncstrl.vatech_cs//TR-94-08, Computer Science, Virginia Polytechnic Institute and State University.

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Abstract

Life cycle validation, verification, and testing (VV&T) is extremely important for the success of a simulation study. This paper surveys current software VV&T techniques and current simulation model VV&T techniques and describes how they can all be applied throughout the life cycle of a simulation study. The processes and credibility assessment stages of the life cycle are described and the applicability of the VV&T techniques for each stage is stated. A glossary is provided to explicitly define important terms and VV&T techniques.

Item Type:Departmental Technical Report
Subjects:Computer Science > Historical Collection(Till Dec 2001)
ID Code:390
Deposited By:User autouser
Deposited On:05 December 2001
Alternative Locations: URL:ftp://ei.cs.vt.edu/pub/TechnicalReports/1994/TR-94-08.ps.gz, URL:http://historical.ncstrl.org/tr/ps/vatech_cs/TR-94-08.ps